1. Field of the Invention
The present invention pertains to the field of accelerated graphics port (AGP) bus. More particularly, the invention relates to a structure and method to expand an accelerated graphics port bus to obtain various extended buses.
2. Description of the Related Art
Early stages, the graphic display card is settled in a system bus such as a PCI bus. As the bandwidth of the system bus is narrow and various input/output peripherals may use such a system, the system bus cannot be applied to multimedia application. The high-speed graphic card that settled in the special accelerated graphics is thus developed. The high-speed graphic card normally includes accelerated graphic processor.
FIG. 1 shows a block diagram of conventional computer system. The central processing unit 10 is coupled to the PCI bus 14 via the chip set 12. The chip set 12 includes a South Bridge chip 15 and a North Bridge chip 18. The South Bridge chip 15 and the North Bridge chip 18 are coupled operating via a VLINK bus 17. The PCI bus is coupled to the PCI compatible PCI peripherals 16. Each of the PCI peripheral devices 16 outputs a request signal REQ to request use of the PCI bus 14. Then, the arbiter in the chip set outputs a grant signal GNT to the main controller to allow use. The peripheral devices 16 obtaining the control of the PCI bus 14 then accesses the memory 11 via the chip set 12. Additionally, the system uses a special accelerated graphics port bus to access the accelerated graphic processor 13.
The above structure can meet the requirements of high speed and wide bandwidth of the accelerated graphic processor 13. However, in the high-frequency era, each peripheral device 16 inputs/outputs huge amounts of data at a high speed. These peripheral devices 16 have to access the memory 11 through the South Bridge chip 15, the VLINK bus 17 and the North Bridge chip 18. The South Bridge chip 15 can hardly manage the processing amount, especially being limited by the VLINK bus 17, not to mention further expansion.